The present invention is related to the field of solid state imaging devices and to a method of manufacturing and operating of such devices. More in particular a solid state imaging device manufacturable in a Metal-Oxide-Semiconductor (MOS) or in a Complementary Metal-Oxide-Semiconductor (CMOS) technology is disclosed.
Solid state imaging sensors are known in the art. Commonly solid state imaging sensors are implemented in a CCD-technology or in a CMOS- or MOS-technology. Solid state imaging sensors find a widespread use in camera systems. In this embodiment a matrix of pixels comprising light sensitive elements constitutes an imaging sensor, which is mounting in the camera system. The signal of said matrix is measured and multiplexed to a so-called video-signal.
Solid state imaging sensor based camera systems in general dominate electronic imaging applications such as Closed Circuit Television (CCTV), video cameras and camcorders, scanners and newly developed markets such as PC (Personal Computer)-cameras, PDA""s, cell phones and DSC, and cameras for video conferencing and Digital Still Cameras. Yet another application of solid state imaging sensors in camera systems is the use in digital photography camera systems wherein the actual image is taken within the solid state sensor instead of on a film material. One popular form of solid state image sensor is the Charge Coupled Device (CCD) image sensor, while sensors built entirely in standard CMOS technology are also becoming used. Such CCD and CMOS image sensors commonly comprise an array of pixels formed in a semiconductor substrate, each pixel comprising a photosensitive element which is normally in the form of a photodiode, or alternatively a polysilicon electrode (photogate), for responding to incident light.
CCD-based camera systems have less noise fluctuations in the image compared to CMOS- or MOS-based camera systems. Therefore CCD-based camera systems are nowadays preferred in applications wherein a high image quality is required such as video or still camera applications. There is an ongoing effort in the art to improve the image quality of CMOS-based camera systems. Due to the further miniaturization of the CMOS electronics technology, it is furthermore possible to realize complex CMOS- or MOS-based pixels as small as CCD-based pixels. It is a further advantage of CMOs- or MOS-based pixels that CMOS is a technology being offered by most foundries whereas CCD-technology is rarely offered and a more complex and expensive one. Of the image sensors implemented in a CMOS- or MOS-technology, CMOS or MOS image sensors with passive pixels and CMOS or MOS image sensors with active pixels are distinguished. An active pixel is configured with means integrated in the pixel to amplify the charge that is collected on the light sensitive element. Passive pixels do not have said means and require a charge-sensitive amplifier that is not integrated in the pixel and is connected with a long line towards the pixel. For this reason, active pixel image sensors are potentially less sensitive to noise fluctuations than passive pixels. Due to the additional electronics in the active pixel, an active pixel image sensor may be equipped to execute more sophisticated functions, which can be advantageous for the performance of the camera system. Said functions can include filtering, operation at higher speed or operation in more extreme illumination conditions.
The manufacturing of CMOS based active pixel sensors (APS) has several more advantages. The APS sensors can easily be miniaturized. This is because the camera system basically can be a single chip and a lens, with the single chip containing signal processing functionality. The possibility that is offered for miniaturizing the whole camera system is important e.g. for portable applications such as cell phones or portable PC""s. Due to the increased integration of functionality on one chip, also the power consumption of the APS chip can be reduced. Furthermore, the integration of signal processing functions on chip allows for the implementation of specific features such as random access to each pixel of the sensor, and readout of small windows of interest for applications such as machine vision or tracking, and electronic pan and zoom for consumer applications.
As stated above, CMOS image sensors with active pixels include in each pixel at least a photosensitive element and at least one MOS amplifying transistor. A common pixel type is the so-called 3T-pixel that includes a photosensitive element, a reset transistor in series with the photosensitive element and an amplifying transistor connected to the photosensitive element and the reset transistor (see e.g. O. Yadid-Pecht, IEEE Trans. Electr. Dev. 38(8), 1772 (1991)). In some applications, the reset transistor is configured so as to define a 3T-transistor with a logarithmic characteristic (see e.g. M. A. mahowald, SPIE Proceedings Vol. 1473, 52 (1991)).
The imaging process in solid state imaging devices is initiated by radiation impinging on the solid state substrate. In a silicon substrate the impinging electromagnetic radiation such as light creates charge carriers (electron-hole pairs) that are to be collected and further processed in the amplifying electronics in the periphery of the matrix of pixels and/or in the amplifying electronics integrated in the pixel or the matrix of pixels. Commonly the impinging light is detected in photosensitive elements wherein a p-n or n-p or a n+-p or p+-n or any such junction, in the sequel labeled as p-n junction, is present. Thus the photosensitive element can also be a transistor such as a bipolar transistor, or the photosensitive element can also be part of a transistor such as an unsilicided drain/source area of a MOS transistor. The photosensitive element can also be a photogate such as a one-cell charge coupled device (CCD) line or even an IR type of sensor. The p-n junction commonly is in reverse bias, thus with an enhanced depletion layer. The p-n junctions are commonly located at the surface of the solid state substrate wherein the matrix of pixels is integrated. Examples of the geometry of such devices is shown in FIG. 2 of the patent application WO93/19489 and in FIGS. 3-11 of the patent application WO98/49729. A common geometry is schematically shown in FIG. 1 of the present patent application. Shown in FIG. 1 is the cross section of part of a solid state imaging device as commonly implemented in a MOS-technology. The photosensitive element is formed by a n+-p junction (n+-region (11) on p-region (12)) of which the depletion region (13) can be enhanced through the application of an appropriate voltage. The p-region can be a p-well in a substrate or can be the p-type substrate itself. The different photosensitive elements are separated by field isolation regions (LOCOS regions made of oxide material (14)). Also a whole pixel configuration, i.e. the associated amplifying and/or access transistors, can be integrated with the photosensitive elements in the regions in-between the isolation regions.
For the majority of applications of solid state imaging devices, the achievement of a high efficiency in the conversion of the impinging radiation is an important aim and an important design criterion. In particular, for CMOS based imaging devices it is advantageous that this aim is realized without changing significantly the MOS process flow as such non-standard processing would lead to an important price increase of the imaging devices.
Patent application EP883187 discloses a CMOS based imaging device having a high efficiency in the conversion of the impinging radiation. The concept as disclosed in EP883187 however is suitable only for larger gate length devices, namely CMOS based imaging devices implemented in a 1.2 or 0.7 or 0.5 or 0.35 xcexcm CMOS technology. The concept furthermore requests some changes to a standard CMOS process flow. The concept of EP883187 still shows an imperfection in the Modulation Transfer Function of the order of 10% for the larger pixel sizes ( greater than 7,5xc3x977,5 xcexcm) which in a number of applications with smaller pixel sizes such as consumer applications (5,6xc3x975,6 xcexcm) will lead not be acceptable.
In general, in smaller gate length devices the depletion layers of the photosensitive elements are also decreasing, especially as the necessary doping densities of the different regions in smaller gate length devices increase. As a result the conversion efficiency of such smaller gate length CMOS based imaging devices decreases and therefore an important design criterion cannot be met. Moreover the junction leakage current increases over at least an order of magnitude and the junction capacitance increases over several factors.
Another problem in the art is associated with the penetration depth of the impinging radiation. In the prior art detection geometry""s as shown in FIG. 1, the charge carriers that are created deeper in the substrate by for example light photons that penetrate deeper in the solid state substrate, are not collected. This phenomenon leads to a decrease of the conversion efficiency of CMOS based imaging devices. The solution for this problem as disclosed in the patent application EP883187, is hampered by the fact that the charge carriers created in the surface regions of the solid state substrate, outside of the p-n junctions of the photosensitive elements are not collected.
Yet another problem in the art is the presence of damage and dangling bonds at the surface of a solid state substrate. The presence of such surface states in the p-n junctions of the photosensitive elements can create a charge layer and a leakage current that negatively impact the performance of the solid state imaging sensor and therefore of the imaging device.
An aim of the present invention is to disclose a solid state imaging device, such as a detector or a sensor or a camera system, with a high efficiency in the conversion of the impinging radiation. Another aim of the present invention is to disclose a solid state imaging device, such as a detector or a sensor or a camera system that is manufacturable without significantly changing a standard production process to thereby make solid state imaging devices at a reasonable cost. Several aspects of the invention are summarized herebelow. The different aspects and embodiments of the invention that are explained in this section and throughout this specification can be combined. Each of the aspects or embodiments of the invention solves at least one of the problems in the prior art, mentioned hereabove. A number of terms that is used in this summary and throughout the specification is explained at the end of this section.
In a first aspect of the present invention a detector for electromagnetic radiation is disclosed. The detector can be part of an integrated circuit in a solid state (silicon) substrate. The detector can also be at least partly integrated in a solid state substrate, said substrate comprising a first region of a first conductivity and a second region of a second conductivity, said first region being adjacent to said second region, and said first and second region forming a detection junction, at least part of said detection junction being substantially orthogonal with respect to the plane of the surface of the substrate above said detection junction. At least part of said first region and the detection junction can be covered with a passivating layer, optionally defining a smooth interface with the first region. The passivating layer can be an insulating material or a semiconducting material. In a preferred embodiment, the passivating layer is an oxide layer. In these embodiments, the first region and the second region are located in the surface layers of the substrate. The second region may also be covered by the same or another passivating layer. In an embodiment of the invention, said passivating layer can be interrupted with at least one elevated portion of the substrate material, a contact area optionally being within the elevated portion. The region of the second conductivity type can surround the region of the first conductivity type entirely along its sides. According to an embodiment of this first aspect of the invention, use can be made of a first region of n-type conductivity, preferably of a doping level of charge carriers of the order of 1015-1016-1017/cm3, and of a second region of p-type conductivity, preferably of a doping level of charge carriers of the order of 1015-1016-1017/cm3 for making a detector for electromagnetic radiation. The doping levels may also be lower, of the order of 5.1014/cm3, or higher, of the order of 5.1017-1018/cm3. The first and the second region according to this embodiment can have a depth of about 0.3 to 0.5 to 1 xcexcm. Also only the first region can have this depth, the second region being part of the substrate or having the same doping type but a different doping level than the substrate.
The detector may be used as part of a camera system for electronic imaging applications such as cameras and video cameras and camcorders, camera systems for video conferencing, or for digital photography or within medical or industrial imaging systems. The detector may also be part of a camera system in an environment having a memory function such as a PC or a mobile phone or any of the cameras mentioned in the introduction section. In the camera system, the charge carriers that are created by radiation impinging upon the detector, or at least the radiation impinging upon the first region and on the junction in-between the first and the second region, can be collected in the contact area and be transferred to the amplifying and image-processing electronics through metallization of the contact area. In an embodiment of the invention, a voltage can be applied to the contact area in the first region in order to collect charge carriers in this first region while the second region, preferably surrounding said first region, is grounded. At least part of the camera system can be integrated in an integrated circuit (chip), for example in a silicon substrate. In such embodiment the camera system basically can be a single chip and a lens, for example a microlens, with the single chip containing a detector for electromagnetic radiation and signal processing functionality, and a memory for storing the acquired images.
In a second aspect of the present invention, a camera system is disclosed for electromagnetic radiation. Said camera system comprises a configuration or a matrix of pixels in an imaging sensor being integrated in a solid state substrate, essentially each of the pixels including a region of a first conductivity type being at least partly surrounded by a region of a second conductivity type, thereby forming a junction region, the region of the first conductivity type including at least one contact area.
The camera system can further comprise means for collecting charge carriers being generated by the radiation impinging on said substrate at least in said region of said first conductivity type and in said junction region, in said contact area. Hereto, in an embodiment of this second aspect of the invention, a voltage can be applied to the contact area in the first region in order to collect charge carriers in this first region while the second region, preferably surrounding said first region and being shared among adjacent pixels, is grounded.
The camera system can also comprise at least one operation transistor being integrated in an area portion of the region of said second conductivity type. In this way a pixel configuration can be made by connecting the contact area of the first region to the transistor or the set of transistors in the second region. Transistors can also be defined in the region of the first conductivity type. The detection junction of pixels of the sensor of the camera system can be substantially orthogonal with respect to the plane of the surface of the substrate above said detection junction and the region of the second conductivity type can be surrounding the region of the first conductivity type substantially entirely along its sides for one pixel or for all of the pixels.
The camera system can further have a passivating layer on the region of the first conductivity type in either one, or more or all of the pixels, the passivating layer optionally defining a smooth interface with the region of the first conductivity type. The passivating layer may also be present on the region of the second conductivity type. The passivating layer can contain an insulator material and the contact area in the region of the first conductivity part can be on an elevated part of the substrate, said elevated part interrupting said layer containing the insulator material.
The radiation that is impinging on the camera system can be directed to the different pixels through a microlens system that preferably is directing the radiation impinging on said imaging sensor into said region of said first conductivity type and in said Junction region. The camera system can also comprise a filter being sensitive for a characteristic of the impinging radiation, such as the color of the light impinging on the camera system. In an embodiment of the invention, the camera system or part of it can be integrated with the matrix of pixels in a silicon substrate according to a 1.2 or 0.7 or 0.5 or 0.35 or 0.25 or 0.18 mm or a smaller gate length CMOS process. The CMOS process can include a shallow-trench isolation (STI)-option. In this way the camera system basically can be a single silicon chip and a lens, with the single chip containing signal processing functionality. The possibility that is offered for miniaturizing the whole camera system is important e.g. for portable applications such as cell phones or portable PC""s. Due to the integration of functionality and sensor on one chip, the power consumption of the camera system can be reduced. Furthermore, the integration of signal processing functions on chip allows for the implementation of specific features such as random access to each pixel of the sensor, and readout of small windows of interest for applications such as machine vision or tracking, and electronic pan and zoom for consumer applications.
The camera system for electronic imaging applications can be a camera or a video camera or a camcorder, or a camera system for video conferencing, or a camera system for digital photography or for medical or industrial imaging applications. The camera may also be integrated in an environment having a memory function such as a PC or a mobile phone or any of the cameras mentioned in the introduction section.
In a third aspect of the present invention, a method is disclosed for fabricating a camera system for electromagnetic radiation, said camera system comprising a configuration of pixels in an imaging sensor being integrated in a solid state substrate of a second conductivity type. The method comprises the steps of:
defining a region of a first conductivity type in said substrate
defining a region of a second conductivity type, adjacent to said region of said first conductivity type in said substrate, thereby forming a junction region;
etching at least part of the substrate of the region of the first conductivity type to thereby form a trench in said substrate;
filling the etched trench with a passivating material; and optionally
providing means for contacting the region of the first conductivity type and means for collecting charge carriers being generated by the radiation impinging on said substrate at least in said region of said first conductivity type and in said junction region, in said means for contacting the region of the first conductivity type.
In a fourth aspect of the present invention, a method of operating a camera system for electromagnetic radiation is disclosed, said camera system comprising a configuration of pixels in an imaging sensor being integrated in a solid state substrate, essentially each of the pixels comprising a region of a first conductivity type being at least partly surrounded by a region of a second conductivity type, thereby forming a junction region, and wherein the region of the first conductivity type includes at least one contact area. The method comprises the step of configuring the region of the first conductivity type and the region of the second conductivity type as to collect charge carriers being generated by the radiation impinging on said substrate at least in said region of said first conductivity type and in said junction region, in said contact area.
A number of terms that is used in this summary and throughout the specification is explained herebelow. With the terms adjacent, for example adjacent regions, it is meant that the regions can be adjacent while still being separate one form another, and that the regions can be adjacent and abutting one to another. An operation transistor can be any transistor that forms part of a sensor or a camera system, such as an access transistor or an amplifying transistor of a pixel. An environment with memory functionality for example can be a PC or any computer or our ASIC with memory functionality or a digital photography or imaging sensor.